Some processors have very good interal cache coherency, while some processors (notably embedded RISC chips) force you to be more careful about cache coherency. These functions are provided to ensure that you can maintain that coherency when doing things like loading new code into RAM.
Flush a range of instruction cache starting at the physical address start and going for count bytes. The value of count may be rounded up to the next closest possible size.
Invalidate a range of data/operand cache starting at the given physical address and going for the given number of bytes. If the processor is using write-back cache, then the contents of the write-back cache will be lost.
Flush a range of data/operand cache starting at the given physical address and going for the given number of bytes. If the processor is using write-back cache, then the contents of the cache will be written out to RAM before being invalidated.