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Macros
Re-Execution type

Macros

#define EXC_USER_BREAK_PRE   0x01e0
 User break before instruction. More...
 
#define EXC_INSTR_ADDRESS   0x00e0
 Instruction address. More...
 
#define EXC_ITLB_MISS   0x0040
 Instruction TLB miss. More...
 
#define EXC_ITLB_PV   0x00a0
 Instruction TLB protection violation. More...
 
#define EXC_ILLEGAL_INSTR   0x0180
 Illegal instruction. More...
 
#define EXC_SLOT_ILLEGAL_INSTR   0x01a0
 Slot illegal instruction. More...
 
#define EXC_GENERAL_FPU   0x0800
 General FPU exception. More...
 
#define EXC_SLOT_FPU   0x0820
 Slot FPU exception. More...
 
#define EXC_DATA_ADDRESS_READ   0x00e0
 Data address (read) More...
 
#define EXC_DATA_ADDRESS_WRITE   0x0100
 Data address (write) More...
 
#define EXC_DTLB_MISS_READ   0x0040
 Data TLB miss (read) More...
 
#define EXC_DTLB_MISS_WRITE   0x0060
 Data TLB miss (write) More...
 
#define EXC_DTLB_PV_READ   0x00a0
 Data TLB protection violation (read) More...
 
#define EXC_DTLB_PV_WRITE   0x00c0
 Data TLB protection violation (write) More...
 
#define EXC_FPU   0x0120
 FPU exception. More...
 
#define EXC_INITIAL_PAGE_WRITE   0x0080
 Initial page write exception. More...
 

Detailed Description

These exceptions will stop the currently processing instruction, and transition into exception processing. After handling the exception (assuming that it can be handled by the code), the offending instruction will be re-executed from the start.

Macro Definition Documentation

#define EXC_DATA_ADDRESS_READ   0x00e0

Data address (read)

#define EXC_DATA_ADDRESS_WRITE   0x0100

Data address (write)

#define EXC_DTLB_MISS_READ   0x0040

Data TLB miss (read)

#define EXC_DTLB_MISS_WRITE   0x0060

Data TLB miss (write)

#define EXC_DTLB_PV_READ   0x00a0

Data TLB protection violation (read)

#define EXC_DTLB_PV_WRITE   0x00c0

Data TLB protection violation (write)

#define EXC_FPU   0x0120

FPU exception.

#define EXC_GENERAL_FPU   0x0800

General FPU exception.

#define EXC_ILLEGAL_INSTR   0x0180

Illegal instruction.

#define EXC_INITIAL_PAGE_WRITE   0x0080

Initial page write exception.

#define EXC_INSTR_ADDRESS   0x00e0

Instruction address.

#define EXC_ITLB_MISS   0x0040

Instruction TLB miss.

#define EXC_ITLB_PV   0x00a0

Instruction TLB protection violation.

#define EXC_SLOT_FPU   0x0820

Slot FPU exception.

#define EXC_SLOT_ILLEGAL_INSTR   0x01a0

Slot illegal instruction.

#define EXC_USER_BREAK_PRE   0x01e0

User break before instruction.